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core: refactor emulated cpu core activation
This commit is contained in:
Liam
parent
90e87c40e8
commit
45c87c7e6e
47 changed files with 2984 additions and 3332 deletions
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@ -12,20 +12,20 @@
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#include "common/common_types.h"
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#include "core/hardware_properties.h"
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#include "core/hle/kernel/svc_types.h"
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namespace Common {
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struct PageTable;
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}
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namespace Kernel {
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enum class VMAPermission : u8;
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enum class DebugWatchpointType : u8;
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struct DebugWatchpoint;
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class KThread;
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class KProcess;
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} // namespace Kernel
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namespace Core {
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class System;
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class CPUInterruptHandler;
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using WatchpointArray = std::array<Kernel::DebugWatchpoint, Core::Hardware::NUM_WATCHPOINTS>;
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// NOTE: these values match the HaltReason enum in Dynarmic
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@ -40,197 +40,74 @@ enum class HaltReason : u64 {
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DECLARE_ENUM_FLAG_OPERATORS(HaltReason);
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enum class Architecture {
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Aarch32,
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Aarch64,
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AArch64,
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AArch32,
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};
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/// Generic ARMv8 CPU interface
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class ARM_Interface {
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class ArmInterface {
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public:
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YUZU_NON_COPYABLE(ARM_Interface);
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YUZU_NON_MOVEABLE(ARM_Interface);
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YUZU_NON_COPYABLE(ArmInterface);
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YUZU_NON_MOVEABLE(ArmInterface);
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explicit ARM_Interface(System& system_, bool uses_wall_clock_)
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: system{system_}, uses_wall_clock{uses_wall_clock_} {}
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virtual ~ARM_Interface() = default;
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explicit ArmInterface(bool uses_wall_clock) : m_uses_wall_clock{uses_wall_clock} {}
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virtual ~ArmInterface() = default;
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struct ThreadContext32 {
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std::array<u32, 16> cpu_registers{};
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std::array<u32, 64> extension_registers{};
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u32 cpsr{};
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u32 fpscr{};
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u32 fpexc{};
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u32 tpidr{};
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};
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// Internally within the kernel, it expects the AArch32 version of the
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// thread context to be 344 bytes in size.
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static_assert(sizeof(ThreadContext32) == 0x150);
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struct ThreadContext64 {
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std::array<u64, 31> cpu_registers{};
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u64 sp{};
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u64 pc{};
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u32 pstate{};
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std::array<u8, 4> padding{};
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std::array<u128, 32> vector_registers{};
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u32 fpcr{};
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u32 fpsr{};
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u64 tpidr{};
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};
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// Internally within the kernel, it expects the AArch64 version of the
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// thread context to be 800 bytes in size.
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static_assert(sizeof(ThreadContext64) == 0x320);
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/// Perform any backend-specific initialization.
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// Perform any backend-specific initialization.
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virtual void Initialize() {}
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/// Runs the CPU until an event happens
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void Run();
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// Runs the CPU until an event happens.
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virtual HaltReason RunThread(Kernel::KThread* thread) = 0;
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/// Clear all instruction cache
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// Runs the CPU for one instruction or until an event happens.
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virtual HaltReason StepThread(Kernel::KThread* thread) = 0;
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// Admits a backend-specific mechanism to lock the thread context.
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virtual void LockThread(Kernel::KThread* thread) {}
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virtual void UnlockThread(Kernel::KThread* thread) {}
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// Clear the entire instruction cache for this CPU.
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virtual void ClearInstructionCache() = 0;
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/**
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* Clear instruction cache range
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* @param addr Start address of the cache range to clear
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* @param size Size of the cache range to clear, starting at addr
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*/
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// Clear a range of the instruction cache for this CPU.
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virtual void InvalidateCacheRange(u64 addr, std::size_t size) = 0;
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/**
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* Notifies CPU emulation that the current page table has changed.
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* @param new_page_table The new page table.
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* @param new_address_space_size_in_bits The new usable size of the address space in bits.
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* This can be either 32, 36, or 39 on official software.
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*/
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virtual void PageTableChanged(Common::PageTable& new_page_table,
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std::size_t new_address_space_size_in_bits) = 0;
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/**
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* Set the Program Counter to an address
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* @param addr Address to set PC to
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*/
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virtual void SetPC(u64 addr) = 0;
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/*
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* Get the current Program Counter
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* @return Returns current PC
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*/
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virtual u64 GetPC() const = 0;
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/**
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* Get the current Stack Pointer
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* @return Returns current SP
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*/
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virtual u64 GetSP() const = 0;
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/**
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* Get an ARM register
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* @param index Register index
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* @return Returns the value in the register
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*/
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virtual u64 GetReg(int index) const = 0;
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/**
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* Set an ARM register
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* @param index Register index
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* @param value Value to set register to
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*/
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virtual void SetReg(int index, u64 value) = 0;
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/**
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* Gets the value of a specified vector register.
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*
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* @param index The index of the vector register.
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* @return the value within the vector register.
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*/
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virtual u128 GetVectorReg(int index) const = 0;
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/**
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* Sets a given value into a vector register.
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*
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* @param index The index of the vector register.
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* @param value The new value to place in the register.
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*/
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virtual void SetVectorReg(int index, u128 value) = 0;
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/**
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* Get the current PSTATE register
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* @return Returns the value of the PSTATE register
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*/
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virtual u32 GetPSTATE() const = 0;
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/**
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* Set the current PSTATE register
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* @param pstate Value to set PSTATE to
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*/
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virtual void SetPSTATE(u32 pstate) = 0;
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virtual u64 GetTlsAddress() const = 0;
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virtual void SetTlsAddress(u64 address) = 0;
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/**
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* Gets the value within the TPIDR_EL0 (read/write software thread ID) register.
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*
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* @return the value within the register.
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*/
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virtual u64 GetTPIDR_EL0() const = 0;
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/**
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* Sets a new value within the TPIDR_EL0 (read/write software thread ID) register.
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*
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* @param value The new value to place in the register.
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*/
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virtual void SetTPIDR_EL0(u64 value) = 0;
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// Get the current architecture.
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// This returns AArch64 when PSTATE.nRW == 0 and AArch32 when PSTATE.nRW == 1.
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virtual Architecture GetArchitecture() const = 0;
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virtual void SaveContext(ThreadContext32& ctx) const = 0;
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virtual void SaveContext(ThreadContext64& ctx) const = 0;
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virtual void LoadContext(const ThreadContext32& ctx) = 0;
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virtual void LoadContext(const ThreadContext64& ctx) = 0;
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void LoadWatchpointArray(const WatchpointArray* wp);
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/// Clears the exclusive monitor's state.
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virtual void ClearExclusiveState() = 0;
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// Context accessors.
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// These should not be called if the CPU is running.
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virtual void GetContext(Kernel::Svc::ThreadContext& ctx) const = 0;
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virtual void SetContext(const Kernel::Svc::ThreadContext& ctx) = 0;
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virtual void SetTpidrroEl0(u64 value) = 0;
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/// Signal an interrupt and ask the core to halt as soon as possible.
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virtual void SignalInterrupt() = 0;
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virtual void GetSvcArguments(std::span<uint64_t, 8> args) const = 0;
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virtual void SetSvcArguments(std::span<const uint64_t, 8> args) = 0;
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virtual u32 GetSvcNumber() const = 0;
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/// Clear a previous interrupt.
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virtual void ClearInterrupt() = 0;
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void SetWatchpointArray(const WatchpointArray* watchpoints) {
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m_watchpoints = watchpoints;
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}
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struct BacktraceEntry {
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std::string module;
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u64 address;
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u64 original_address;
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u64 offset;
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std::string name;
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};
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// Signal an interrupt for execution to halt as soon as possible.
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// It is safe to call this if the CPU is not running.
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virtual void SignalInterrupt(Kernel::KThread* thread) = 0;
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static std::vector<BacktraceEntry> GetBacktraceFromContext(System& system,
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const ThreadContext32& ctx);
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static std::vector<BacktraceEntry> GetBacktraceFromContext(System& system,
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const ThreadContext64& ctx);
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// Stack trace generation.
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void LogBacktrace(const Kernel::KProcess* process) const;
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std::vector<BacktraceEntry> GetBacktrace() const;
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void LogBacktrace() const;
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// Debug functionality.
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virtual const Kernel::DebugWatchpoint* HaltedWatchpoint() const = 0;
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virtual void RewindBreakpointInstruction() = 0;
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protected:
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/// System context that this ARM interface is running under.
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System& system;
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const WatchpointArray* watchpoints;
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bool uses_wall_clock;
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static void SymbolicateBacktrace(Core::System& system, std::vector<BacktraceEntry>& out);
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const Kernel::DebugWatchpoint* MatchingWatchpoint(
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u64 addr, u64 size, Kernel::DebugWatchpointType access_type) const;
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virtual HaltReason RunJit() = 0;
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virtual HaltReason StepJit() = 0;
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virtual u32 GetSvcNumber() const = 0;
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virtual const Kernel::DebugWatchpoint* HaltedWatchpoint() const = 0;
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virtual void RewindBreakpointInstruction() = 0;
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protected:
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const WatchpointArray* m_watchpoints{};
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bool m_uses_wall_clock{};
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};
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} // namespace Core
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