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[vk, opengl] defer checks to topmost call (avoid unnecessary call) (#40)
Co-authored-by: crueter <crueter@eden-emu.dev> Reviewed-on: https://git.eden-emu.dev/eden-emu/eden/pulls/40 Co-authored-by: lizzie <lizzie@eden-emu.dev> Co-committed-by: lizzie <lizzie@eden-emu.dev>
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03351a4f8b
commit
5091759a47
4 changed files with 66 additions and 61 deletions
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@ -1,3 +1,6 @@
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// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project
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// SPDX-License-Identifier: GPL-3.0-or-later
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// SPDX-FileCopyrightText: 2015 Citra Emulator Project
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// SPDX-FileCopyrightText: 2018 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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@ -868,35 +871,35 @@ struct Memory::Impl {
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[[nodiscard]] u8* GetPointerImpl(u64 vaddr, auto on_unmapped, auto on_rasterizer) const {
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// AARCH64 masks the upper 16 bit of all memory accesses
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vaddr = vaddr & 0xffffffffffffULL;
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if (!AddressSpaceContains(*current_page_table, vaddr, 1)) [[unlikely]] {
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on_unmapped();
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return nullptr;
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} else {
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// Avoid adding any extra logic to this fast-path block
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const uintptr_t raw_pointer = current_page_table->pointers[vaddr >> YUZU_PAGEBITS].Raw();
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if (const uintptr_t pointer = Common::PageTable::PageInfo::ExtractPointer(raw_pointer)) {
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return reinterpret_cast<u8*>(pointer + vaddr);
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} else {
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switch (Common::PageTable::PageInfo::ExtractType(raw_pointer)) {
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case Common::PageType::Unmapped:
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on_unmapped();
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return nullptr;
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case Common::PageType::Memory:
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ASSERT_MSG(false, "Mapped memory page without a pointer @ 0x{:016X}", vaddr);
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return nullptr;
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case Common::PageType::DebugMemory:
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return GetPointerFromDebugMemory(vaddr);
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case Common::PageType::RasterizerCachedMemory: {
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u8* const host_ptr{GetPointerFromRasterizerCachedMemory(vaddr)};
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on_rasterizer();
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return host_ptr;
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}
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default:
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UNREACHABLE();
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}
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return nullptr;
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}
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}
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// Avoid adding any extra logic to this fast-path block
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const uintptr_t raw_pointer = current_page_table->pointers[vaddr >> YUZU_PAGEBITS].Raw();
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if (const uintptr_t pointer = Common::PageTable::PageInfo::ExtractPointer(raw_pointer)) {
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return reinterpret_cast<u8*>(pointer + vaddr);
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}
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switch (Common::PageTable::PageInfo::ExtractType(raw_pointer)) {
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case Common::PageType::Unmapped:
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on_unmapped();
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return nullptr;
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case Common::PageType::Memory:
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ASSERT_MSG(false, "Mapped memory page without a pointer @ 0x{:016X}", vaddr);
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return nullptr;
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case Common::PageType::DebugMemory:
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return GetPointerFromDebugMemory(vaddr);
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case Common::PageType::RasterizerCachedMemory: {
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u8* const host_ptr{GetPointerFromRasterizerCachedMemory(vaddr)};
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on_rasterizer();
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return host_ptr;
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}
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default:
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UNREACHABLE();
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}
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return nullptr;
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}
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[[nodiscard]] u8* GetPointer(const Common::ProcessAddress vaddr) const {
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@ -1149,13 +1152,19 @@ struct Memory::Impl {
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gpu_device_memory->ApplyOpOnPointer(p, scratch_buffers[core], [&](DAddr address) {
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auto& current_area = rasterizer_write_areas[core];
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PAddr subaddress = address >> YUZU_PAGEBITS;
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bool do_collection = current_area.last_address == subaddress;
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if (!do_collection) [[unlikely]] {
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do_collection = system.GPU().OnCPUWrite(address, size);
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if (!do_collection) {
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// Performance note:
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// It may not be a good idea to assume accesses are within the same subaddress (i.e same page)
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// It is often the case the games like to access wildly different addresses. Hence why I propose
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// we should let the compiler just do it's thing...
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if (current_area.last_address != subaddress) {
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// Short circuit the need to check for address/size
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auto const do_collection = (address != 0 && size != 0)
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&& system.GPU().OnCPUWrite(address, size);
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if (do_collection) {
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current_area.last_address = subaddress;
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} else {
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return;
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}
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current_area.last_address = subaddress;
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}
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gpu_dirty_managers[core].Collect(address, size);
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});
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@ -1,3 +1,6 @@
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// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project
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// SPDX-License-Identifier: GPL-3.0-or-later
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// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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@ -244,7 +247,7 @@ public:
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void InvalidateRegion(DAddr addr, u64 size);
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/// Notify rasterizer that CPU is trying to write this area. It returns true if the area is
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/// sensible, false otherwise
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/// sensible, false otherwise, addr and size must be a valid combination
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bool OnCPUWrite(DAddr addr, u64 size);
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/// Notify rasterizer that any caches of the specified region should be flushed and invalidated
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@ -1,3 +1,6 @@
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// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project
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// SPDX-License-Identifier: GPL-3.0-or-later
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// SPDX-FileCopyrightText: 2015 Citra Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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@ -565,22 +568,17 @@ void RasterizerOpenGL::InvalidateRegion(DAddr addr, u64 size, VideoCommon::Cache
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bool RasterizerOpenGL::OnCPUWrite(DAddr addr, u64 size) {
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MICROPROFILE_SCOPE(OpenGL_CacheManagement);
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if (addr == 0 || size == 0) {
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return false;
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}
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DEBUG_ASSERT(addr != 0 || size != 0);
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{
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std::scoped_lock lock{buffer_cache.mutex};
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if (buffer_cache.OnCPUWrite(addr, size)) {
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return true;
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}
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}
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{
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std::scoped_lock lock{texture_cache.mutex};
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texture_cache.WriteMemory(addr, size);
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}
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shader_cache.InvalidateRegion(addr, size);
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return false;
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}
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@ -1204,24 +1202,24 @@ void RasterizerOpenGL::SyncLogicOpState() {
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}
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flags[Dirty::LogicOp] = false;
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auto& regs = maxwell3d->regs;
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if (device.IsAmd()) {
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using namespace Tegra::Engines;
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struct In {
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const Maxwell3D::Regs::VertexAttribute::Type d;
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In(Maxwell3D::Regs::VertexAttribute::Type n) : d(n) {}
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bool operator()(Maxwell3D::Regs::VertexAttribute n) const {
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return n.type == d;
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}
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};
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bool has_float =
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std::any_of(regs.vertex_attrib_format.begin(), regs.vertex_attrib_format.end(),
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In(Maxwell3D::Regs::VertexAttribute::Type::Float));
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regs.logic_op.enable = static_cast<u32>(!has_float);
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}
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auto& regs = maxwell3d->regs;
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if (device.IsAmd()) {
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using namespace Tegra::Engines;
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struct In {
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const Maxwell3D::Regs::VertexAttribute::Type d;
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In(Maxwell3D::Regs::VertexAttribute::Type n) : d(n) {}
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bool operator()(Maxwell3D::Regs::VertexAttribute n) const {
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return n.type == d;
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}
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};
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bool has_float =
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std::any_of(regs.vertex_attrib_format.begin(), regs.vertex_attrib_format.end(),
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In(Maxwell3D::Regs::VertexAttribute::Type::Float));
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regs.logic_op.enable = static_cast<u32>(!has_float);
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}
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if (regs.logic_op.enable) {
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glEnable(GL_COLOR_LOGIC_OP);
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glLogicOp(MaxwellToGL::LogicOp(regs.logic_op.op));
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@ -636,22 +636,17 @@ void RasterizerVulkan::InnerInvalidation(std::span<const std::pair<DAddr, std::s
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}
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bool RasterizerVulkan::OnCPUWrite(DAddr addr, u64 size) {
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if (addr == 0 || size == 0) {
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return false;
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}
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DEBUG_ASSERT(addr != 0 || size != 0);
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{
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std::scoped_lock lock{buffer_cache.mutex};
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if (buffer_cache.OnCPUWrite(addr, size)) {
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return true;
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}
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}
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{
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std::scoped_lock lock{texture_cache.mutex};
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texture_cache.WriteMemory(addr, size);
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}
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pipeline_cache.InvalidateRegion(addr, size);
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return false;
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}
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