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TEST: Skip CPU Write

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Gamer64 2025-06-30 01:41:08 +02:00 • committed by edendev
parent 3e15876552
commit 7c3142f7e9
1 changed files with 3 additions and 3 deletions
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6
src/video_core/rasterizer_interface.h
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@ -100,9 +100,9 @@ public:
VideoCommon::CacheType which = VideoCommon::CacheType::All) = 0; VideoCommon::CacheType which = VideoCommon::CacheType::All) = 0;
virtual void InnerInvalidation(std::span<const std::pair<DAddr, std::size_t>> sequences) { virtual void InnerInvalidation(std::span<const std::pair<DAddr, std::size_t>> sequences) {
for (const auto& [cpu_addr, size] : sequences) { /*for (const auto& [cpu_addr, size] : sequences) {
InvalidateRegion(cpu_addr, size); InvalidateRegion(cpu_addr, size);
} }*/
} }
/// Notify rasterizer that any caches of the specified region are desync with guest /// Notify rasterizer that any caches of the specified region are desync with guest
@ -147,7 +147,7 @@ public:
[[nodiscard]] virtual bool AccelerateSurfaceCopy( [[nodiscard]] virtual bool AccelerateSurfaceCopy(
const Tegra::Engines::Fermi2D::Surface& src, const Tegra::Engines::Fermi2D::Surface& dst, const Tegra::Engines::Fermi2D::Surface& src, const Tegra::Engines::Fermi2D::Surface& dst,
const Tegra::Engines::Fermi2D::Config& copy_config) { const Tegra::Engines::Fermi2D::Config& copy_config) {
return true; return false;
} }
[[nodiscard]] virtual Tegra::Engines::AccelerateDMAInterface& AccessAccelerateDMA() = 0; [[nodiscard]] virtual Tegra::Engines::AccelerateDMAInterface& AccessAccelerateDMA() = 0;