mirror of
https://git.eden-emu.dev/eden-emu/eden.git
synced 2025-07-20 11:45:47 +00:00
[dynarmic] stub peepholes; fix tests
This commit is contained in:
parent
ab631e6b28
commit
f414ebdf34
12 changed files with 347 additions and 188 deletions
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@ -344,6 +344,8 @@ IR::Block A64AddressSpace::GenerateIR(IR::LocationDescriptor descriptor) const {
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}
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}
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if (conf.HasOptimization(OptimizationFlag::MiscIROpt)) {
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if (conf.HasOptimization(OptimizationFlag::MiscIROpt)) {
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Optimization::A64MergeInterpretBlocksPass(ir_block, conf.callbacks);
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Optimization::A64MergeInterpretBlocksPass(ir_block, conf.callbacks);
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Optimization::X64Peepholes(ir_block);
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Optimization::DeadCodeElimination(ir_block);
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}
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}
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Optimization::VerificationPass(ir_block);
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Optimization::VerificationPass(ir_block);
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@ -285,6 +285,8 @@ private:
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}
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}
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if (conf.HasOptimization(OptimizationFlag::MiscIROpt)) {
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if (conf.HasOptimization(OptimizationFlag::MiscIROpt)) {
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Optimization::A64MergeInterpretBlocksPass(ir_block, conf.callbacks);
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Optimization::A64MergeInterpretBlocksPass(ir_block, conf.callbacks);
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Optimization::X64Peepholes(ir_block);
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Optimization::DeadCodeElimination(ir_block);
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}
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}
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Optimization::VerificationPass(ir_block);
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Optimization::VerificationPass(ir_block);
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return emitter.Emit(ir_block).entrypoint;
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return emitter.Emit(ir_block).entrypoint;
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@ -43,5 +43,6 @@ void DeadCodeElimination(IR::Block& block);
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void IdentityRemovalPass(IR::Block& block);
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void IdentityRemovalPass(IR::Block& block);
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void VerificationPass(const IR::Block& block);
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void VerificationPass(const IR::Block& block);
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void NamingPass(IR::Block& block);
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void NamingPass(IR::Block& block);
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void X64Peepholes(IR::Block& block);
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} // namespace Dynarmic::Optimization
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} // namespace Dynarmic::Optimization
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24
externals/dynarmic/src/dynarmic/ir/opt/x64_peepholes.cpp
vendored
Normal file
24
externals/dynarmic/src/dynarmic/ir/opt/x64_peepholes.cpp
vendored
Normal file
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@ -0,0 +1,24 @@
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/* This file is part of the dynarmic project.
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* Copyright (c) 2018 MerryMage
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* SPDX-License-Identifier: 0BSD
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*/
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#include <boost/variant/get.hpp>
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#include <mcl/stdint.hpp>
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#include "dynarmic/frontend/A64/a64_location_descriptor.h"
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#include "dynarmic/frontend/A64/translate/a64_translate.h"
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#include "dynarmic/interface/A64/config.h"
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#include "dynarmic/ir/basic_block.h"
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#include "dynarmic/ir/opt/passes.h"
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namespace Dynarmic::Optimization {
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// blind peepholes
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void X64Peepholes(IR::Block& block) {
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for (auto iter = block.begin(); iter != block.end(); iter++) {
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}
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}
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} // namespace Dynarmic::Optimization
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@ -539,7 +539,8 @@ TEST_CASE("arm: Memory access (fastmem)", "[arm][A32]") {
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char* backing_memory = reinterpret_cast<char*>(std::align(page_size, memory_size, buffer_ptr, buffer_size_nconst));
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char* backing_memory = reinterpret_cast<char*>(std::align(page_size, memory_size, buffer_ptr, buffer_size_nconst));
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A32FastmemTestEnv env{backing_memory};
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A32FastmemTestEnv env{backing_memory};
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Dynarmic::A32::UserConfig config{&env};
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Dynarmic::A32::UserConfig config{};
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config.callbacks = &env;
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config.fastmem_pointer = reinterpret_cast<uintptr_t>(backing_memory);
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config.fastmem_pointer = reinterpret_cast<uintptr_t>(backing_memory);
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config.recompile_on_fastmem_failure = false;
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config.recompile_on_fastmem_failure = false;
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config.processor_id = 0;
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config.processor_id = 0;
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250
externals/dynarmic/tests/A64/a64.cpp
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250
externals/dynarmic/tests/A64/a64.cpp
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File diff suppressed because one or more lines are too long
4
externals/dynarmic/tests/A64/fp_min_max.cpp
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4
externals/dynarmic/tests/A64/fp_min_max.cpp
vendored
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@ -64,7 +64,9 @@ u32 force_default_nan(u32 value) {
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template<typename Fn>
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template<typename Fn>
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void run_test(u32 instruction, Fn fn) {
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void run_test(u32 instruction, Fn fn) {
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A64TestEnv env;
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A64TestEnv env;
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A64::Jit jit{A64::UserConfig{&env}};
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A64::UserConfig jit_user_config{};
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jit_user_config.callbacks = &env;
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A64::Jit jit{jit_user_config};
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env.code_mem.emplace_back(instruction); // FMAX S0, S1, S2
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env.code_mem.emplace_back(instruction); // FMAX S0, S1, S2
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env.code_mem.emplace_back(0x14000000); // B .
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env.code_mem.emplace_back(0x14000000); // B .
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@ -154,7 +154,8 @@ static u32 GenFloatInst(u64 pc, bool is_last_inst) {
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}
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}
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static Dynarmic::A64::UserConfig GetUserConfig(A64TestEnv& jit_env) {
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static Dynarmic::A64::UserConfig GetUserConfig(A64TestEnv& jit_env) {
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Dynarmic::A64::UserConfig jit_user_config{&jit_env};
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Dynarmic::A64::UserConfig jit_user_config{};
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jit_user_config.callbacks = &jit_env;
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jit_user_config.optimizations &= ~OptimizationFlag::FastDispatch;
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jit_user_config.optimizations &= ~OptimizationFlag::FastDispatch;
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// The below corresponds to the settings for qemu's aarch64_max_initfn
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// The below corresponds to the settings for qemu's aarch64_max_initfn
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jit_user_config.dczid_el0 = 7;
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jit_user_config.dczid_el0 = 7;
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@ -10,7 +10,8 @@
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TEST_CASE("misaligned load/store do not use page_table when detect_misaligned_access_via_page_table is set", "[a64]") {
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TEST_CASE("misaligned load/store do not use page_table when detect_misaligned_access_via_page_table is set", "[a64]") {
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A64TestEnv env;
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A64TestEnv env;
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Dynarmic::A64::UserConfig conf{&env};
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Dynarmic::A64::UserConfig conf{};
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conf.callbacks = &env;
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conf.page_table = nullptr;
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conf.page_table = nullptr;
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conf.detect_misaligned_access_via_page_table = 128;
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conf.detect_misaligned_access_via_page_table = 128;
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conf.only_detect_misalignment_via_page_table_on_page_boundary = true;
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conf.only_detect_misalignment_via_page_table_on_page_boundary = true;
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@ -12,8 +12,8 @@ using namespace Dynarmic;
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TEST_CASE("ensure fast dispatch entry is cleared even when a block does not have any patching requirements", "[a64]") {
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TEST_CASE("ensure fast dispatch entry is cleared even when a block does not have any patching requirements", "[a64]") {
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A64TestEnv env;
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A64TestEnv env;
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A64::UserConfig conf{};
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A64::UserConfig conf{&env};
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conf.callbacks = &env;
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A64::Jit jit{conf};
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A64::Jit jit{conf};
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REQUIRE(conf.HasOptimization(OptimizationFlag::FastDispatch));
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REQUIRE(conf.HasOptimization(OptimizationFlag::FastDispatch));
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@ -64,8 +64,8 @@ TEST_CASE("ensure fast dispatch entry is cleared even when a block does not have
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TEST_CASE("ensure fast dispatch entry is cleared even when a block does not have any patching requirements 2", "[a64]") {
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TEST_CASE("ensure fast dispatch entry is cleared even when a block does not have any patching requirements 2", "[a64]") {
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A64TestEnv env;
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A64TestEnv env;
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A64::UserConfig conf{};
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A64::UserConfig conf{&env};
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conf.callbacks = &env;
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A64::Jit jit{conf};
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A64::Jit jit{conf};
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REQUIRE(conf.HasOptimization(OptimizationFlag::FastDispatch));
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REQUIRE(conf.HasOptimization(OptimizationFlag::FastDispatch));
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86
externals/dynarmic/tests/test_generator.cpp
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86
externals/dynarmic/tests/test_generator.cpp
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@ -23,6 +23,7 @@
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#include "./rand_int.h"
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#include "./rand_int.h"
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#include "dynarmic/common/fp/fpcr.h"
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#include "dynarmic/common/fp/fpcr.h"
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#include "dynarmic/common/fp/fpsr.h"
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#include "dynarmic/common/fp/fpsr.h"
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#include "dynarmic/common/llvm_disassemble.h"
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#include "dynarmic/frontend/A32/ITState.h"
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#include "dynarmic/frontend/A32/ITState.h"
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#include "dynarmic/frontend/A32/a32_location_descriptor.h"
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#include "dynarmic/frontend/A32/a32_location_descriptor.h"
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#include "dynarmic/frontend/A32/a32_types.h"
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#include "dynarmic/frontend/A32/a32_types.h"
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@ -402,33 +403,35 @@ void RunTestInstance(Dynarmic::A32::Jit& jit,
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const std::vector<typename TestEnv::InstructionType>& instructions,
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const std::vector<typename TestEnv::InstructionType>& instructions,
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const u32 cpsr,
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const u32 cpsr,
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const u32 fpscr,
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const u32 fpscr,
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const size_t ticks_left) {
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const size_t ticks_left,
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const bool show_disas) {
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const u32 initial_pc = regs[15];
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const u32 initial_pc = regs[15];
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const u32 num_words = initial_pc / sizeof(typename TestEnv::InstructionType);
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const u32 num_words = initial_pc / sizeof(typename TestEnv::InstructionType);
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const u32 code_mem_size = num_words + static_cast<u32>(instructions.size());
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const u32 code_mem_size = num_words + static_cast<u32>(instructions.size());
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fmt::print("instructions:");
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if (show_disas) {
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fmt::print("instructions:\n");
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auto current_pc = initial_pc;
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for (auto instruction : instructions) {
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for (auto instruction : instructions) {
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if constexpr (sizeof(decltype(instruction)) == 2) {
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if constexpr (sizeof(decltype(instruction)) == 2) {
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fmt::print(" {:04x}", instruction);
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fmt::print("{:04x} ?\n", instruction);
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} else {
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} else {
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fmt::print(" {:08x}", instruction);
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fmt::print("{}", Dynarmic::Common::DisassembleAArch64(instruction, current_pc));
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}
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}
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current_pc += sizeof(decltype(instruction));
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}
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}
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fmt::print("\n");
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fmt::print("initial_regs:");
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fmt::print("initial_regs:");
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for (u32 i : regs) {
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for (u32 i : regs)
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fmt::print(" {:08x}", i);
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fmt::print(" {:08x}", i);
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}
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fmt::print("\n");
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fmt::print("\n");
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fmt::print("initial_vecs:");
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fmt::print("initial_vecs:");
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for (u32 i : vecs) {
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for (u32 i : vecs)
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fmt::print(" {:08x}", i);
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fmt::print(" {:08x}", i);
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}
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fmt::print("\n");
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fmt::print("\n");
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fmt::print("initial_cpsr: {:08x}\n", cpsr);
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fmt::print("initial_cpsr: {:08x}\n", cpsr);
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fmt::print("initial_fpcr: {:08x}\n", fpscr);
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fmt::print("initial_fpcr: {:08x}\n", fpscr);
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}
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jit.ClearCache();
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jit.ClearCache();
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@ -450,6 +453,7 @@ void RunTestInstance(Dynarmic::A32::Jit& jit,
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jit.Run();
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jit.Run();
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}
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}
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if (show_disas) {
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fmt::print("final_regs:");
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fmt::print("final_regs:");
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for (u32 i : jit.Regs()) {
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for (u32 i : jit.Regs()) {
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fmt::print(" {:08x}", i);
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fmt::print(" {:08x}", i);
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@ -462,24 +466,24 @@ void RunTestInstance(Dynarmic::A32::Jit& jit,
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fmt::print("\n");
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fmt::print("\n");
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fmt::print("final_cpsr: {:08x}\n", jit.Cpsr());
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fmt::print("final_cpsr: {:08x}\n", jit.Cpsr());
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fmt::print("final_fpsr: {:08x}\n", mask_fpsr_cum_bits ? jit.Fpscr() & 0xffffff00 : jit.Fpscr());
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fmt::print("final_fpsr: {:08x}\n", mask_fpsr_cum_bits ? jit.Fpscr() & 0xffffff00 : jit.Fpscr());
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fmt::print("mod_mem: ");
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fmt::print("mod_mem: ");
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for (auto [addr, value] : jit_env.modified_memory) {
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for (auto [addr, value] : jit_env.modified_memory) {
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fmt::print("{:08x}:{:02x} ", addr, value);
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fmt::print("{:08x}:{:02x} ", addr, value);
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}
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}
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fmt::print("\n");
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fmt::print("\n");
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fmt::print("interrupts:\n");
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fmt::print("interrupts:\n");
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for (const auto& i : jit_env.interrupts) {
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for (const auto& i : jit_env.interrupts) {
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std::puts(i.c_str());
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std::puts(i.c_str());
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}
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}
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fmt::print("===\n");
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fmt::print("===\n");
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jit.DumpDisassembly();
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}
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}
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}
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Dynarmic::A64::UserConfig GetA64UserConfig(A64TestEnv& jit_env, bool noopt) {
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Dynarmic::A64::UserConfig GetA64UserConfig(A64TestEnv& jit_env, bool noopt) {
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Dynarmic::A64::UserConfig jit_user_config{&jit_env};
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Dynarmic::A64::UserConfig jit_user_config{};
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jit_user_config.optimizations &= ~OptimizationFlag::FastDispatch;
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jit_user_config.callbacks = &jit_env;
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jit_user_config.optimizations = all_safe_optimizations;
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// The below corresponds to the settings for qemu's aarch64_max_initfn
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// The below corresponds to the settings for qemu's aarch64_max_initfn
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jit_user_config.dczid_el0 = 7;
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jit_user_config.dczid_el0 = 7;
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jit_user_config.ctr_el0 = 0x80038003;
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jit_user_config.ctr_el0 = 0x80038003;
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@ -499,7 +503,8 @@ void RunTestInstance(Dynarmic::A64::Jit& jit,
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const u32 fpcr,
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const u32 fpcr,
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const u64 initial_sp,
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const u64 initial_sp,
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const u64 start_address,
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const u64 start_address,
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const size_t ticks_left) {
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const size_t ticks_left,
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const bool show_disas) {
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jit.ClearCache();
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jit.ClearCache();
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for (size_t jit_rerun_count = 0; jit_rerun_count < num_jit_reruns; ++jit_rerun_count) {
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for (size_t jit_rerun_count = 0; jit_rerun_count < num_jit_reruns; ++jit_rerun_count) {
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@ -522,59 +527,53 @@ void RunTestInstance(Dynarmic::A64::Jit& jit,
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jit.Run();
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jit.Run();
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}
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}
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fmt::print("instructions:");
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if (show_disas) {
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fmt::print("instructions:\n");
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auto current_pc = start_address;
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for (u32 instruction : instructions) {
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for (u32 instruction : instructions) {
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fmt::print(" {:08x}", instruction);
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fmt::print("{}", Dynarmic::Common::DisassembleAArch64(instruction, current_pc));
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current_pc += 4;
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}
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}
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fmt::print("\n");
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fmt::print("initial_regs:");
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fmt::print("initial_regs:");
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for (u64 i : regs) {
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for (u64 i : regs)
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fmt::print(" {:016x}", i);
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fmt::print(" {:016x}", i);
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}
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fmt::print("\n");
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fmt::print("\n");
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fmt::print("initial_vecs:");
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fmt::print("initial_vecs:");
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for (auto i : vecs) {
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for (auto i : vecs)
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fmt::print(" {:016x}:{:016x}", i[0], i[1]);
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fmt::print(" {:016x}:{:016x}", i[0], i[1]);
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}
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fmt::print("\n");
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fmt::print("\n");
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fmt::print("initial_sp: {:016x}\n", initial_sp);
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fmt::print("initial_sp: {:016x}\n", initial_sp);
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fmt::print("initial_pstate: {:08x}\n", pstate);
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fmt::print("initial_pstate: {:08x}\n", pstate);
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fmt::print("initial_fpcr: {:08x}\n", fpcr);
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fmt::print("initial_fpcr: {:08x}\n", fpcr);
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fmt::print("final_regs:");
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fmt::print("final_regs:");
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for (u64 i : jit.GetRegisters()) {
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for (u64 i : jit.GetRegisters())
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fmt::print(" {:016x}", i);
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fmt::print(" {:016x}", i);
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}
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fmt::print("\n");
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fmt::print("\n");
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fmt::print("final_vecs:");
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fmt::print("final_vecs:");
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for (auto i : jit.GetVectors()) {
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for (auto i : jit.GetVectors())
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fmt::print(" {:016x}:{:016x}", i[0], i[1]);
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fmt::print(" {:016x}:{:016x}", i[0], i[1]);
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}
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fmt::print("\n");
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fmt::print("\n");
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fmt::print("final_sp: {:016x}\n", jit.GetSP());
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fmt::print("final_sp: {:016x}\n", jit.GetSP());
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fmt::print("final_pc: {:016x}\n", jit.GetPC());
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fmt::print("final_pc: {:016x}\n", jit.GetPC());
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fmt::print("final_pstate: {:08x}\n", jit.GetPstate());
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fmt::print("final_pstate: {:08x}\n", jit.GetPstate());
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fmt::print("final_fpcr: {:08x}\n", jit.GetFpcr());
|
fmt::print("final_fpcr: {:08x}\n", jit.GetFpcr());
|
||||||
fmt::print("final_qc : {}\n", FP::FPSR{jit.GetFpsr()}.QC());
|
fmt::print("final_qc : {}\n", FP::FPSR{jit.GetFpsr()}.QC());
|
||||||
|
|
||||||
fmt::print("mod_mem:");
|
fmt::print("mod_mem:");
|
||||||
for (auto [addr, value] : jit_env.modified_memory) {
|
for (auto [addr, value] : jit_env.modified_memory)
|
||||||
fmt::print(" {:08x}:{:02x}", addr, value);
|
fmt::print(" {:08x}:{:02x}", addr, value);
|
||||||
}
|
|
||||||
fmt::print("\n");
|
fmt::print("\n");
|
||||||
|
|
||||||
fmt::print("interrupts:\n");
|
fmt::print("interrupts:\n");
|
||||||
for (const auto& i : jit_env.interrupts) {
|
for (const auto& i : jit_env.interrupts)
|
||||||
std::puts(i.c_str());
|
std::puts(i.c_str());
|
||||||
}
|
|
||||||
|
|
||||||
fmt::print("===\n");
|
fmt::print("===\n");
|
||||||
|
jit.DumpDisassembly();
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
} // Anonymous namespace
|
} // Anonymous namespace
|
||||||
|
|
||||||
void TestThumb(size_t num_instructions, size_t num_iterations, bool noopt) {
|
void TestThumb(size_t num_instructions, size_t num_iterations, bool noopt, bool show_disas) {
|
||||||
ThumbTestEnv jit_env{};
|
ThumbTestEnv jit_env{};
|
||||||
Dynarmic::A32::Jit jit{GetA32UserConfig(jit_env, noopt)};
|
Dynarmic::A32::Jit jit{GetA32UserConfig(jit_env, noopt)};
|
||||||
|
|
||||||
|
@ -597,11 +596,11 @@ void TestThumb(size_t num_instructions, size_t num_iterations, bool noopt) {
|
||||||
}
|
}
|
||||||
|
|
||||||
regs[15] = start_address;
|
regs[15] = start_address;
|
||||||
RunTestInstance(jit, jit_env, regs, ext_reg, instructions, cpsr, fpcr, num_instructions);
|
RunTestInstance(jit, jit_env, regs, ext_reg, instructions, cpsr, fpcr, num_instructions, show_disas);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void TestArm(size_t num_instructions, size_t num_iterations, bool noopt) {
|
void TestArm(size_t num_instructions, size_t num_iterations, bool noopt, bool show_disas) {
|
||||||
ArmTestEnv jit_env{};
|
ArmTestEnv jit_env{};
|
||||||
Dynarmic::A32::Jit jit{GetA32UserConfig(jit_env, noopt)};
|
Dynarmic::A32::Jit jit{GetA32UserConfig(jit_env, noopt)};
|
||||||
|
|
||||||
|
@ -623,11 +622,11 @@ void TestArm(size_t num_instructions, size_t num_iterations, bool noopt) {
|
||||||
}
|
}
|
||||||
|
|
||||||
regs[15] = start_address;
|
regs[15] = start_address;
|
||||||
RunTestInstance(jit, jit_env, regs, ext_reg, instructions, cpsr, fpcr, num_instructions);
|
RunTestInstance(jit, jit_env, regs, ext_reg, instructions, cpsr, fpcr, num_instructions, show_disas);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void TestA64(size_t num_instructions, size_t num_iterations, bool noopt) {
|
void TestA64(size_t num_instructions, size_t num_iterations, bool noopt, bool show_disas) {
|
||||||
A64TestEnv jit_env{};
|
A64TestEnv jit_env{};
|
||||||
Dynarmic::A64::Jit jit{GetA64UserConfig(jit_env, noopt)};
|
Dynarmic::A64::Jit jit{GetA64UserConfig(jit_env, noopt)};
|
||||||
|
|
||||||
|
@ -649,7 +648,7 @@ void TestA64(size_t num_instructions, size_t num_iterations, bool noopt) {
|
||||||
instructions.emplace_back(GenRandomA64Inst(static_cast<u32>(start_address + 4 * instructions.size()), i == num_instructions - 1));
|
instructions.emplace_back(GenRandomA64Inst(static_cast<u32>(start_address + 4 * instructions.size()), i == num_instructions - 1));
|
||||||
}
|
}
|
||||||
|
|
||||||
RunTestInstance(jit, jit_env, regs, vecs, instructions, pstate, fpcr, initial_sp, start_address, num_instructions);
|
RunTestInstance(jit, jit_env, regs, vecs, instructions, pstate, fpcr, initial_sp, start_address, num_instructions, show_disas);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -677,6 +676,7 @@ int main(int argc, char* argv[]) {
|
||||||
const auto instruction_count = str2sz(argv[3]);
|
const auto instruction_count = str2sz(argv[3]);
|
||||||
const auto iterator_count = str2sz(argv[4]);
|
const auto iterator_count = str2sz(argv[4]);
|
||||||
const bool noopt = argc == 6 && (strcmp(argv[5], "noopt") == 0);
|
const bool noopt = argc == 6 && (strcmp(argv[5], "noopt") == 0);
|
||||||
|
const bool show_disas = argc == 6 && (strcmp(argv[5], "disas") == 0);
|
||||||
|
|
||||||
if (!seed || !instruction_count || !iterator_count) {
|
if (!seed || !instruction_count || !iterator_count) {
|
||||||
fmt::print("invalid numeric arguments\n");
|
fmt::print("invalid numeric arguments\n");
|
||||||
|
@ -686,11 +686,11 @@ int main(int argc, char* argv[]) {
|
||||||
detail::g_rand_int_generator.seed(static_cast<std::mt19937::result_type>(*seed));
|
detail::g_rand_int_generator.seed(static_cast<std::mt19937::result_type>(*seed));
|
||||||
|
|
||||||
if (strcmp(argv[1], "thumb") == 0) {
|
if (strcmp(argv[1], "thumb") == 0) {
|
||||||
TestThumb(*instruction_count, *iterator_count, noopt);
|
TestThumb(*instruction_count, *iterator_count, noopt, show_disas);
|
||||||
} else if (strcmp(argv[1], "arm") == 0) {
|
} else if (strcmp(argv[1], "arm") == 0) {
|
||||||
TestArm(*instruction_count, *iterator_count, noopt);
|
TestArm(*instruction_count, *iterator_count, noopt, show_disas);
|
||||||
} else if (strcmp(argv[1], "a64") == 0) {
|
} else if (strcmp(argv[1], "a64") == 0) {
|
||||||
TestA64(*instruction_count, *iterator_count, noopt);
|
TestA64(*instruction_count, *iterator_count, noopt, show_disas);
|
||||||
} else {
|
} else {
|
||||||
fmt::print("unrecognized instruction class\n");
|
fmt::print("unrecognized instruction class\n");
|
||||||
return 1;
|
return 1;
|
||||||
|
|
3
externals/dynarmic/tests/test_reader.cpp
vendored
3
externals/dynarmic/tests/test_reader.cpp
vendored
|
@ -158,7 +158,8 @@ void RunTestInstance(Dynarmic::A32::Jit& jit,
|
||||||
}
|
}
|
||||||
|
|
||||||
A64::UserConfig GetA64UserConfig(A64TestEnv& jit_env, bool noopt) {
|
A64::UserConfig GetA64UserConfig(A64TestEnv& jit_env, bool noopt) {
|
||||||
A64::UserConfig jit_user_config{&jit_env};
|
A64::UserConfig jit_user_config{};
|
||||||
|
jit_user_config.callbacks = &jit_env;
|
||||||
jit_user_config.optimizations &= ~OptimizationFlag::FastDispatch;
|
jit_user_config.optimizations &= ~OptimizationFlag::FastDispatch;
|
||||||
// The below corresponds to the settings for qemu's aarch64_max_initfn
|
// The below corresponds to the settings for qemu's aarch64_max_initfn
|
||||||
jit_user_config.dczid_el0 = 7;
|
jit_user_config.dczid_el0 = 7;
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue