8 commits

Author	SHA1	Message	Date
ameerj	60b33bdc9f	spirv/convert: Catch more signed operations oversights ... The sign bit on integers of size < 32 was not properly preserved in casts	2021-07-22 21:51:35 -04:00
ReinUsesLisp	4fedf2c20a	spirv/convert: Catch more broken signed operations on Nvidia OpenGL ... BitCast U32 to S32 before converting to float on drivers with broken signed operations.	2021-07-22 21:51:35 -04:00
ReinUsesLisp	055db41f19	Move SPIR-V emission functions to their own header	2021-07-22 21:51:30 -04:00
ReinUsesLisp	55ff0ab463	spirv: Implement int8 and int16 conversion fallbacks	2021-07-22 21:51:29 -04:00
ReinUsesLisp	6398d03341	shader: Implement I2F	2021-07-22 21:51:23 -04:00
ReinUsesLisp	a956d3cdb3	shader: Initial support for textures and TEX	2021-07-22 21:51:23 -04:00
ReinUsesLisp	8230e271ea	shader: Implement HADD2	2021-07-22 21:51:23 -04:00
ReinUsesLisp	a2fe90fa60	spirv: Add lower fp16 to fp32 pass	2021-07-22 21:51:22 -04:00