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This formats all copyright comments according to SPDX formatting guidelines. Additionally, this resolves the remaining GPLv2 only licensed files by relicensing them to GPLv2.0-or-later.
73 lines
2.5 KiB
C++
73 lines
2.5 KiB
C++
// SPDX-FileCopyrightText: Copyright 2021 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#include "common/bit_field.h"
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#include "common/common_types.h"
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#include "shader_recompiler/frontend/maxwell/translate/impl/impl.h"
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namespace Shader::Maxwell {
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namespace {
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void BFE(TranslatorVisitor& v, u64 insn, const IR::U32& src) {
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union {
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u64 insn;
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BitField<0, 8, IR::Reg> dest_reg;
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BitField<8, 8, IR::Reg> offset_reg;
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BitField<40, 1, u64> brev;
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BitField<47, 1, u64> cc;
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BitField<48, 1, u64> is_signed;
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} const bfe{insn};
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const IR::U32 offset{v.ir.BitFieldExtract(src, v.ir.Imm32(0), v.ir.Imm32(8), false)};
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const IR::U32 count{v.ir.BitFieldExtract(src, v.ir.Imm32(8), v.ir.Imm32(8), false)};
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// Common constants
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const IR::U32 zero{v.ir.Imm32(0)};
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const IR::U32 one{v.ir.Imm32(1)};
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const IR::U32 max_size{v.ir.Imm32(32)};
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// Edge case conditions
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const IR::U1 zero_count{v.ir.IEqual(count, zero)};
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const IR::U1 exceed_count{v.ir.IGreaterThanEqual(v.ir.IAdd(offset, count), max_size, false)};
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const IR::U1 replicate{v.ir.IGreaterThanEqual(offset, max_size, false)};
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IR::U32 base{v.X(bfe.offset_reg)};
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if (bfe.brev != 0) {
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base = v.ir.BitReverse(base);
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}
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IR::U32 result{v.ir.BitFieldExtract(base, offset, count, bfe.is_signed != 0)};
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if (bfe.is_signed != 0) {
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const IR::U1 is_negative{v.ir.ILessThan(base, zero, true)};
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const IR::U32 replicated_bit{v.ir.Select(is_negative, v.ir.Imm32(-1), zero)};
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const IR::U32 exceed_bit{v.ir.BitFieldExtract(base, v.ir.Imm32(31), one, false)};
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// Replicate condition
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result = IR::U32{v.ir.Select(replicate, replicated_bit, result)};
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// Exceeding condition
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const IR::U32 exceed_result{v.ir.BitFieldInsert(result, exceed_bit, v.ir.Imm32(31), one)};
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result = IR::U32{v.ir.Select(exceed_count, exceed_result, result)};
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}
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// Zero count condition
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result = IR::U32{v.ir.Select(zero_count, zero, result)};
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v.X(bfe.dest_reg, result);
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if (bfe.cc != 0) {
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v.SetZFlag(v.ir.IEqual(result, zero));
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v.SetSFlag(v.ir.ILessThan(result, zero, true));
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v.ResetCFlag();
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v.ResetOFlag();
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}
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}
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} // Anonymous namespace
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void TranslatorVisitor::BFE_reg(u64 insn) {
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BFE(*this, insn, GetReg20(insn));
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}
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void TranslatorVisitor::BFE_cbuf(u64 insn) {
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BFE(*this, insn, GetCbuf(insn));
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}
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void TranslatorVisitor::BFE_imm(u64 insn) {
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BFE(*this, insn, GetImm20(insn));
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}
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} // namespace Shader::Maxwell
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