Commit graph

6007 commits

Author SHA1 Message Date
Valentin Vanelslande
a105e0f72d default_ini: change default cpu core to dynarmic 2018-03-22 19:43:59 -06:00
bunnei
b5f6fc64f8 Merge pull request #263 from N00byKing/non3ds
Remove more N3DS References
2018-03-22 18:02:51 -04:00
N00byKing
35d617d342 Remove more N3DS References 2018-03-22 21:25:06 +01:00
bunnei
60d64da665 Merge pull request #261 from mailwl/spl
Service/spl: add module and services
2018-03-22 10:28:28 -04:00
mailwl
e0d1e257a8 Service/spl: add module and services 2018-03-22 09:55:14 +03:00
bunnei
3a37f55067 Merge pull request #258 from Subv/gpu_attribs
GPU: Added vertex attrib format and triangle topology registers
2018-03-21 19:36:06 -04:00
bunnei
40ec71f2ec Merge pull request #260 from N00byKing/3535
Implement Pull #3535 from citra: CMake: Set EMU_ARCH_BITS in CMakeLists.txt
2018-03-21 18:49:00 -04:00
bunnei
0465ca474a Merge pull request #259 from N00byKing/usehttps
Use HTTPS for lz4
2018-03-21 18:48:39 -04:00
N00byKing
9b619405e9 CMake: Set EMU_ARCH_BITS in CMakeLists.txt 2018-03-21 19:03:20 +01:00
N00byKing
634f6cf645 Use HTTPS for Submodule lz4 2018-03-21 19:01:54 +01:00
bunnei
b50a73f3f5 Merge pull request #257 from mailwl/vi-module
Service/vi: convert services to module
2018-03-21 10:48:15 -04:00
Subv
f3a5328f09 GPU: Added vertex attribute format registers. 2018-03-21 09:26:47 -05:00
mailwl
eaf65829ca Service/vi: convert services to module 2018-03-21 13:09:40 +03:00
Subv
a569ee8a58 GPU: Added registers for the number of vertices to render. 2018-03-20 23:28:06 -05:00
bunnei
766c6de88d Merge pull request #254 from bunnei/port-citra-renderer
Port Citra OpenGL rasterizer code
2018-03-20 21:37:43 -04:00
bunnei
ffbd925d0f Merge pull request #256 from mailwl/fatal
Service: add fatal:u, fatal:p services
2018-03-20 11:12:39 -04:00
mailwl
ce7e0e503b Service: add fatal:u, fatal:p services 2018-03-20 16:59:02 +03:00
bunnei
188a685e73 renderer_gl: Port boilerplate rasterizer code over from Citra. 2018-03-20 00:07:32 -04:00
bunnei
e0f3facd01 gl_shader_util: Sync latest version with Citra. 2018-03-20 00:07:31 -04:00
bunnei
756e14027a renderer_gl: Port over gl_shader_gen module from Citra. 2018-03-20 00:07:30 -04:00
Mat M
9b5ae0daf5 Merge pull request #253 from Subv/rt_depth
GPU: Added registers for color and Z buffers.
2018-03-19 23:37:47 -04:00
bunnei
f1e9d5404d renderer_gl: Port over gl_shader_decompiler module from Citra. 2018-03-19 23:14:03 -04:00
bunnei
a533c3398c renderer_gl: Port over gl_rasterizer_cache module from Citra. 2018-03-19 23:14:03 -04:00
bunnei
ac51a39abf gl_resource_manager: Sync latest version with Citra. 2018-03-19 23:14:02 -04:00
bunnei
52bfc102bc renderer_gl: Port over gl_stream_buffer module from Citra. 2018-03-19 23:14:02 -04:00
bunnei
3cd8e8a062 externals: Update Glad to latest version used by Citra. 2018-03-19 23:14:01 -04:00
bunnei
b1ceeb5c42 gl_state: Sync latest version with Citra. 2018-03-19 23:13:49 -04:00
Subv
3e645f5595 GPU: Added Z buffer registers to Maxwell3D's reg structure. 2018-03-19 16:55:33 -05:00
Subv
b942bfbb13 GPU: Added the render target (RT) registers to Maxwell3D's reg structure. 2018-03-19 16:46:29 -05:00
bunnei
bb2083fd8d Merge pull request #252 from N00byKing/3064
Implement Pull #3064 from citra: Clean all format warnings (Yuzu-specific format warnings cleared too)
2018-03-19 16:29:03 -04:00
N00byKing
d3bdad2aaa Clang Fixes 2018-03-19 17:53:35 +01:00
N00byKing
f69c369cfb oops 2018-03-19 17:43:04 +01:00
N00byKing
8d34c0d2a0 More Warning cleanups 2018-03-19 17:27:04 +01:00
N00byKing
1212e9e231 Clean Warnings (?) 2018-03-19 17:07:08 +01:00
bunnei
70d45b2a59 Merge pull request #251 from Subv/tic_tsc
GPU: Added TIC and TSC registers to the Maxwell3D register structure.
2018-03-19 10:33:21 -04:00
Subv
c0f954906c GPU: Added the TSC registers to the Maxwell3D register structure. 2018-03-19 00:36:25 -05:00
Subv
f6e3d3aa1a GPU: Added the TIC registers to the Maxwell3D register structure. 2018-03-19 00:32:57 -05:00
bunnei
8d9b2cb438 Merge pull request #193 from N00byKing/3184_2_robotic_boogaloo
Implement Pull #3184 from citra: core/arm: Improve timing accuracy before service calls in JIT (Rebased)
2018-03-18 22:35:47 -04:00
bunnei
341925e40a Merge pull request #250 from bunnei/buffer-dequeue-wait
vi: TransactParcel DequeueBuffer should wait current thread
2018-03-18 22:25:09 -04:00
bunnei
e5f0affc54 Merge pull request #249 from Subv/macro_E1A
GPU: Implement macro 0xE1A BindTextureInfoBuffer in HLE.
2018-03-18 21:04:29 -04:00
bunnei
bae5ccd6d2 vi: Remove DequeueBuffer and wait until next available buffer. 2018-03-18 20:56:35 -04:00
bunnei
7750edae39 hle_ipc: Add SleepClientThread to block current thread within HLE routines. 2018-03-18 20:56:34 -04:00
bunnei
01d72e813e hle_ipc: Use shared_ptr instead of unique_ptr to allow copies. 2018-03-18 20:56:33 -04:00
bunnei
479400acc8 hle_ipc: Remove GetPointer(..) usage with WriteToOutgoingCommandBuffer. 2018-03-18 20:56:33 -04:00
bunnei
d6c27e6b28 thread: Add THREADSTATUS_WAIT_HLE_EVENT, remove THREADSTATUS_WAIT_ARB. 2018-03-18 20:56:32 -04:00
Subv
36c527131f GPU: Implement macro 0xE1A BindTextureInfoBuffer in HLE.
This macro simply sets the current CB_ADDRESS to the texture buffer address for the input shader stage.
2018-03-18 19:03:40 -05:00
bunnei
4b716e163a Merge pull request #248 from Subv/cb_data
GPU: Handle writes to the CB_DATA method.
2018-03-18 19:45:40 -04:00
Subv
80b0f4d681 GPU: Implement the BindStorageBuffer macro method in HLE.
This macro binds the SSBO Info Buffer as the current ConstBuffer.
This buffer is usually bound to c0 during shader execution.
Games seem to use this macro instead of directly writing the address for some reason.
2018-03-18 16:50:42 -05:00
Subv
845415cc3d GPU: Handle writes to the CB_DATA method.
Writing to this method will cause the written value to be stored in the currently-set ConstBuffer plus CB_POS.

This method is usually used to upload uniforms or other shader-visible data.
2018-03-18 15:23:24 -05:00
Subv
46bbeeb54a GPU: Move the GPU's class constructor and destructors to a cpp file.
This should reduce recompile times when editing the Maxwell3D register structure.
2018-03-18 15:23:24 -05:00